The production of ready-to-use wafers from bulk monocrystalline Float Zone or Czochralski silicon goes through many steps in order to meet the requirements from manufacturers of electronic devices. The first step is to certify that the bulk properties of the silicon is in accordance with the customer specification. This part of the specification are mostly centered around the bulk resistivity, the bulk resistivity variation and various crystalline performance measures such as the bulk lifetime of minority carriers and the purity of the bulk silicon. The second step is to arrange the wafering in accordance with the custumer specification. This part of the specification are concerned with the state of the surface and the mechnical requirements such as the thickness, the thickness variation and the state of the periphery of the wafer. In the following the various wafering steps are discussed.
The as-grown monocrystalline silicon crystal has the form of a cylindrical rod that is usually a little larger than what is required in the specification. The rod is grinded to the final diameter that also lowers the thickness variation to +/-0.1 mm or better and flat parts or notches are grinded on the rod. These flats or notches are put on according to SEMI standards or customer specification and they indicate for the customer the crystalline direction after which the ingot has been sliced and whether the bulk of the crystal is p- or n-type.
For the manufacturing of the actual wafers the bulk silicon rod is sliced using either an Inner Diameter (ID) saw or a wiresaw. The ID saw is a sequential slicing method which is slicing one wafer at a time with diamond coated blades whereas the wiresaw is a parallel slicing method that cuts up the whole rod in one operation by use of coated wires.
The slicing introduces deep damage zones in the bulk of the silicon wafer and the slicing also result in large thickness variations and waviness across the wafer because of the nature of the slicing. Preplanarization of wafers prior to the final wafering steps is therefore needed and for this at least two methods exists. One is the traditional double side lapping process and the other is a relatively new double side grinding process. Both remove material in processes in which the wafers are not mounted on chucks, but instead are lying freely in cassettes. Lapping is achieved with abrasive slurries; for example alumina based slurries whereas double side grinding is done in pure water with grinding wheels for removing material.
Lapping and grinding effectively removes irregularities and waviness on the wafers. Lapping, however, does not entirely remove the damage layer and therefore extra process steps are necessary to remove damage form the surface of the wafers. Grinding, on the other hand, have the possibility of giving smooth, damage free surfaces ready for production. The grinded surfaces are not so well specified as is a polished surface, but it can have the appearance of a polished surface. Some of the issues for grinded wafer surfaces are the grinding wheel marks and the micro surface roughness.
Lapping damage is removed in fast liquidus etchants. The etchants removes from 1-10 mm of material per minute and is capable of providing ready-to-use wafers with appearances that resembles polished wafer surfaces. The wafers are free from damage, but issues remain around the micro surface roughness.
A true mirror like surface appearance on silicon wafers requires the use of chemo-mechanical polishing (CMP). On an average the surface roughness of polished wafers ready for electronics or epitaxial growth of top layers can be better than the atomic distance between individual silicon atoms. Double side polishing preserves the good mechanical parameters obtained in previous wafer steps, but for one side polishing where the wafer is mounted on a chuck, efforts must be taken to preserve the good mechanical parameters obtained in previous wafer steps.
The mechanical parameters of the wafers are measured and sorted in wafer checker equipment that is capable of measuring with resolutions down to 10 nm and to sort wafers after 40 different parameters using a non contact capacitive probe technology. Normally, the most important parameters to check are the thickness and flatness parameters of the wafers. This include measurements of the actual thickness, the thickness variation, the global flatness of the wafer and the flatness of the wafers in rectangular smaller parts of the wafer, but also it includes measurements of the bow and the warp of the wafers. All of these parameters are very important for manufacturers of electronics because the state of the starting wafer has a significant impact on the final manufacturing yield.
